Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32653 )
Change subject: soc/amd/stoneyridge: Move LPC support to common ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/#/c/32653/6/src/soc/amd/stoneyridge/southbridge.... File src/soc/amd/stoneyridge/southbridge.c:
https://review.coreboot.org/#/c/32653/6/src/soc/amd/stoneyridge/southbridge.... PS6, Line 230: STONEYRIDGE_LEGACY_FREE
Why dependency on legacy free? Couldn't we have a legacy board using external SIO?
I don't disagree with your thinking, but this source is simply relocated from line 560.
It went into the code in https://review.coreboot.org/c/coreboot/+/25755 which you'd reviewed. The FCH AGESA code contains a LegacyFree configuration, which may be the original impetus for the symbol. (Now it looks like it's used primarily for setting the FADT properly.)
Given that Marc was pulling functionality from AGESA into coreboot in 25755, and I'm not modifying that behavior, I'd like to leave this here for now and consider a followon patch if we want to remove the if(CONFIG()).