[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Reinstate APL_SKIP_SET_POWER_LIMITS

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41786 )

Change subject: soc/intel/apollolake: Reinstate APL_SKIP_SET_POWER_LIMITS
......................................................................

soc/intel/apollolake: Reinstate APL_SKIP_SET_POWER_LIMITS

The config option APL_SKIP_SET_POWER_LIMITS was accidentally left out
during the set_power_limits refactor (SHA 2adb50d32e8). This patch
reinstates the config option which will cause APL boards to not set any
power limits.

TEST=util/abuild/abuild -p none -t siemens/mc_apl1 -a

Change-Id: Iec9f9f340d50a1212b6ef20c2c0e1b66385ae1b2
Signed-off-by: Tim Wawrzynczak 
---
M src/soc/intel/apollolake/chip.c
1 file changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/41786/1

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index cc190ba..1bd7332 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -322,6 +322,11 @@
    /* Allocate ACPI NVS in CBMEM */
    cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(struct global_nvs_t));

+	if (CONFIG(APL_SKIP_SET_POWER_LIMITS)) {
+		printk(BIOS_INFO, "Skip the RAPL settings.\n");
+		return;
+	}
+
    config = config_of_soc();
    /* Set RAPL MSR for Package power limits */
    soc_config = &config->power_limits_config;