John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41812 )
Change subject: soc/intel/tigerlake: Configure TcssDma0En and TcssDma1En ......................................................................
soc/intel/tigerlake: Configure TcssDma0En and TcssDma1En
Determine the TcssDma0 and TcssDma1 enabling based on TBT DMA controllers setting.
BUG=:b:146624360 TEST=Booted on Volteer and verified TcssDma0 and TcssDma1 enabling. lspci shows TcssDma0(0d.2) and TcssDma1(0d.3).
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I61ac4131481374e9a2a34d1a30f822046c3897fb --- M src/soc/intel/tigerlake/romstage/fsp_params.c 1 file changed, 11 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/41812/1
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c index ede5059..f7956c8 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params.c @@ -116,8 +116,17 @@ m_cfg->TcssXdciEn = config->TcssXdciEn;
/* TCSS DMA */ - m_cfg->TcssDma0En = config->TcssDma0En; - m_cfg->TcssDma1En = config->TcssDma1En; + dev = pcidev_path_on_root(SA_DEVFN_TCSS_DMA0); + if (dev) + m_cfg->TcssDma0En = dev->enabled; + else + m_cfg->TcssDma0En = 0; + + dev = pcidev_path_on_root(SA_DEVFN_TCSS_DMA1); + if (dev) + m_cfg->TcssDma1En = dev->enabled; + else + m_cfg->TcssDma1En = 0;
/* USB4/TBT */ dev = pcidev_path_on_root(SA_DEVFN_TBT0);