[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip options

[Christian Walter (Code Review)]

Christian Walter has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41081 )

Change subject: soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip options
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soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip options

Intel introduced VrPowerDeliveryDesign with Cannonlake. The BIOS needs
to program VrPowerDeliverDesign configuration per platform according to
the platform capabilities to avoid incorrect electrial/power parameters.

Refer to document 599797 for more details.

Change-Id: I89b8dceb40fa6a9dc67b218e91bf728ff928b5a0
Signed-off-by: Christian Walter 
---
M src/soc/intel/cannonlake/chip.h
M src/soc/intel/cannonlake/fsp_params.c
2 files changed, 8 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/41081/1

diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index d4d76cd..0c946cb 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -414,6 +414,10 @@
    uint8_t LanWakeFromDeepSx;
    uint8_t WolEnableOverride;

+#if !CONFIG(SOC_INTEL_COMETLAKE)
+	uint32_t VrPowerDeliveryDesign;
+#endif
+
    /*
     * Override GPIO PM configuration:
     * 0: Use FSP default GPIO PM program,
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index 434bd2b..abffa04 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -460,6 +460,10 @@
 #endif
    }

+#if !CONFIG(SOC_INTEL_COMETLAKE)
+	params->VrPowerDeliveryDesign = config->VrPowerDeliveryDesign;
+#endif
+
    dev = pcidev_path_on_root(SA_DEVFN_IGD);
    if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled)
    	params->PeiGraphicsPeimInit = 1;