[coreboot-gerrit] Change in coreboot[master]: mb/google/zork: Drop GPIO_27 configuration for trembyle reference

[Furquan Shaikh (Code Review)]

Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42939 )

Change subject: mb/google/zork: Drop GPIO_27 configuration for trembyle reference
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mb/google/zork: Drop GPIO_27 configuration for trembyle reference

This change drops GPIO_27 configuration for trembyle reference boards
since it is unused.

BUG=b:159453643

Signed-off-by: Furquan Shaikh 
Change-Id: I57dd78e8abcc61802ca85158e7ff348460ad1d8e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42939
Tested-by: build bot (Jenkins) 
Reviewed-by: Paul Menzel 
Reviewed-by: Aaron Durbin 
---
M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
1 file changed, 0 insertions(+), 6 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Aaron Durbin: Looks good to me, approved

diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
index 835cf99..f037b14 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
@@ -14,8 +14,6 @@
    PAD_GPO(GPIO_5, LOW),
    /* EC_FCH_WAKE_L */
    PAD_WAKE(GPIO_24, PULL_UP, EDGE_LOW, S3_S4_S5),
-	/* PCIE_RST1_L - Variable timings (May remove) */
-	PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE),
    /* NVME_AUX_RESET_L */
    PAD_GPO(GPIO_40, HIGH),
    /* EN_PWR_TOUCHPAD_PS2 - reset */
@@ -45,8 +43,6 @@
    PAD_GPO(GPIO_13, LOW),
    /* EC_FCH_WAKE_L */
    PAD_WAKE(GPIO_24, PULL_UP, EDGE_LOW, S3_S4_S5),
-	/* PCIE_RST1_L - Variable timings (May remove) */
-	PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE),
    /* NVME_AUX_RESET_L */
    PAD_GPO(GPIO_40, HIGH),
    /* EMMC_RESET - reset (default stuffing unused)*/
@@ -307,8 +303,6 @@
 static const struct soc_amd_gpio gpio_sleep_table[] = {
    /* PEN_POWER_EN */
    PAD_GPO(GPIO_5, LOW),
-	/* PCIE_RST1_L */
-	PAD_GPO(GPIO_27, LOW),
    /* NVME_AUX_RESET_L */
    PAD_GPO(GPIO_40, LOW),
    /* EN_PWR_CAMERA */