Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39317 )
Change subject: soc/intel/tigerlake: Enable CNVi Mode
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Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39317/3/src/soc/intel/tigerlake/fsp...
File src/soc/intel/tigerlake/fsp_params_tgl.c:
https://review.coreboot.org/c/coreboot/+/39317/3/src/soc/intel/tigerlake/fsp...
PS3, Line 153: params->CnviMode = config->CnviMode;
: params->CnviBtCore = config->CnviBtCore;
Sorry about the delayed review. I have 2 questions:
a) Can't we use the state of CNVi device in device tree to set this param? Then, we won't need the additional config for CnviMode and CnviBtCore.
b) CNVi is enabled when x86 comes out of reset. So, what is FSP doing with these UPDs? If it is just configuring GPIOs, I think we should be able to handle them in coreboot.
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