Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47828 )
Change subject: soc/amd: move non-CAR linker scripts to common directory
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Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47828/2/src/soc/amd/common/block/cp...
File src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld:
https://review.coreboot.org/c/coreboot/+/47828/2/src/soc/amd/common/block/cp...
PS2, Line 86: _ = ASSERT(CONFIG_BOOTBLOCK_ADDR == ((CONFIG_BOOTBLOCK_ADDR + 0xFFFF) & 0xFFFF0000), "Bootblock must be 16 bit aligned");
The architectural requirement is for X86_RESET_VECTOR to have the traditional IP 0xfff0. So it is the end of bootblock that must be at 64KiB boundary.
I agree, I believe it's only the reset vector we should assert. According to the PSP BIOS design guide
* Reset vector is BIOS image base + size - 0x10
* x86's F000 segment's base address is reset vector + 0x10 - 64K, size of 64K
* x86's CS reset state is 0xfff0
I don't see a need to assert any requirements on the base address of bootblock. (It was surely added out of caution and has remained.) I tried Mandolin with BOOTBLOCK_ADDR 0x4000 higher and C_ENV_BB_SIZE=0xc000. The system booted OK.
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