Ravi kumar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46976 )
Change subject: herobrine: resolve herobrine stanadalone compilation error due to below upstream changes for trogdor ......................................................................
herobrine: resolve herobrine stanadalone compilation error due to below upstream changes for trogdor
error causing with this trogdor upstream commit: "afaa3d0356d5a518442701875505901e5806bb61" trogdor: Modify DDR training to use mrc_cache
Change-Id: I84552daec00519f856bf3fd19e197ebd2eec54e4 --- M src/mainboard/google/herobrine/chromeos.fmd M src/soc/qualcomm/sc7280/Kconfig 2 files changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/46976/1
diff --git a/src/mainboard/google/herobrine/chromeos.fmd b/src/mainboard/google/herobrine/chromeos.fmd index a44a638..0db83ec 100644 --- a/src/mainboard/google/herobrine/chromeos.fmd +++ b/src/mainboard/google/herobrine/chromeos.fmd @@ -11,13 +11,12 @@ RO_FRID 0x100 } RO_VPD(PRESERVE) 228K - RO_DDR_TRAINING(PRESERVE) 8K RO_LIMITS_CFG(PRESERVE) 4K }
RW_VPD(PRESERVE) 32K RW_NVRAM(PRESERVE) 16K - RW_DDR_TRAINING(PRESERVE) 8K + RW_MRC_CACHE(PRESERVE) 8K RW_LIMITS_CFG(PRESERVE) 4K RW_ELOG(PRESERVE) 4K RW_SHARED 4K { diff --git a/src/soc/qualcomm/sc7280/Kconfig b/src/soc/qualcomm/sc7280/Kconfig index fc2f34b..3b1678a 100644 --- a/src/soc/qualcomm/sc7280/Kconfig +++ b/src/soc/qualcomm/sc7280/Kconfig @@ -11,6 +11,7 @@ select HAVE_MONOTONIC_TIMER select ARM64_USE_ARCH_TIMER select SOC_QUALCOMM_COMMON + select CACHE_MRC_SETTINGS
if SOC_QUALCOMM_SC7280
@@ -23,5 +24,6 @@ select VBOOT_RETURN_FROM_VERSTAGE select VBOOT_MUST_REQUEST_DISPLAY select VBOOT_STARTS_IN_BOOTBLOCK + select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN
endif