Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48161 )
Change subject: lenovo/g505s: properly program the IRQ tables ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/48161/1/src/mainboard/lenovo/g505s/... File src/mainboard/lenovo/g505s/mptable.c:
https://review.coreboot.org/c/coreboot/+/48161/1/src/mainboard/lenovo/g505s/... PS1, Line 180: PCI_INT(0x0, 0x14, 0x5, intr_data_ptr[PIRQ_C]); 1) You can just loop over the discovered PCI devices, find out which INT they are using and look that up in mainboard_intr_data[].
2) Ack, will try using this code from ./src/southbridge/intel/common/acpi_pirq_gen.c: ... pci_dev = PCI_SLOT(dev->path.pci.devfn); int_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN); ...
https://review.coreboot.org/c/coreboot/+/48161/1/src/mainboard/lenovo/g505s/... PS1, Line 183: 0x1 This is dynamically allocated so you want to look at ->link_list->secondary of the PCIe devices.