18 May
2020
18 May
'20
3:03 a.m.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36651 )
Change subject: intel/cannonlake: Implement PCIe RP devicetree update ......................................................................
Patch Set 24:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36651/24/src/mainboard/google/hatch... File src/mainboard/google/hatch/variants/duffy/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/36651/24/src/mainboard/google/hatch... PS24, Line 297: device pci 1c.6 on Earlier we always had to keep the function 0 enabled even if it was unused and SoC supported the RP swap. Is that not required anymore?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I4d76f38c222b74053c6a2f80b492d4660ab4db6d
Gerrit-Change-Number: 36651
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