[coreboot-gerrit] Change in coreboot[master]: arch/x86: Simplified postcar WB MTRR setup

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34897 )

Change subject: arch/x86: Simplified postcar WB MTRR setup
......................................................................

arch/x86: Simplified postcar WB MTRR setup

Change-Id: I8822c4dcdced872a19ac183b993e8885aadd0a2c
Signed-off-by: Kyösti Mälkki 
---
M src/soc/intel/skylake/memmap.c
1 file changed, 25 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/34897/1

diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c
index e3590fd..3d8f989 100644
--- a/src/soc/intel/skylake/memmap.c
+++ b/src/soc/intel/skylake/memmap.c
@@ -290,11 +290,10 @@
    return (void *)(uintptr_t)ebda_cfg.tolum_base;
 }

-void fill_postcar_frame(struct postcar_frame *pcf)
+static void postcar_wb_region(uintptr_t *start, size_t *size)
 {
-	uintptr_t top_of_ram;
-	uintptr_t smm_base;
-	size_t smm_size;
+	uintptr_t wb_start, wb_end;
+	size_t wb_size;

/*
     * We need to make sure ramstage will be run cached. At this
@@ -302,10 +301,8 @@
     * Instruct postcar to cache 16 megs under cbmem top which is
     * a safe bet to cover ramstage.
     */
-	top_of_ram = (uintptr_t) cbmem_top();
-	printk(BIOS_DEBUG, "top_of_ram = 0x%lx\n", top_of_ram);
-	top_of_ram -= 16*MiB;
-	postcar_frame_add_mtrr(pcf, top_of_ram, 16*MiB, MTRR_TYPE_WRBACK);
+	wb_start = (uintptr_t) cbmem_top();
+	wb_start -= 16 * MiB;

/*
     * Cache the TSEG region at the top of ram. This region is
@@ -314,6 +311,24 @@
     * when relocating the SMM handler as well as using the TSEG
     * region for other purposes.
     */
-	smm_region(&smm_base, &smm_size);
-	postcar_frame_add_mtrr(pcf, smm_base, smm_size, MTRR_TYPE_WRBACK);
+	smm_region(&wb_end, &wb_size);
+	wb_end += wb_size;
+
+	/* Do some magic alignments */
+	wb_start = ALIGN_DOWN(wb_start, x);
+	wb_end = ALIGN_UP(wb_end, x);
+	wb_size = wb_end - wb_start;
+
+	/* Return one continuos region allowed for WB. */
+	*start = wb_start;
+	*size = wb_size;
+}
+
+void fill_postcar_frame(struct postcar_frame *pcf)
+{
+	uintptr_t wb_start;
+	size_t wb_size;
+
+	postcar_wb_region(&wb_start, &wb_size);
+	postcar_frame_add_mtrr(pcf, wb_start, wb_size, MTRR_TYPE_WRBACK);
 }