[coreboot-gerrit] Change in ...coreboot[master]: i945,ICH7: Add 'FIXME' comment on R/WO register

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31005

Change subject: i945,ICH7: Add 'FIXME' comment on R/WO register
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i945,ICH7: Add 'FIXME' comment on R/WO register

RPFN is a R/WO register we write on it in i945/early_init.c and i82801gx/pcie.c
Drop one of them.

Change-Id: If9a131ad12530876a650b7a38daa9c9fc52aefb7
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/i945/early_init.c
M src/southbridge/intel/i82801gx/pcie.c
2 files changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/31005/1

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 528f1aa..09a18e3 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -347,6 +347,7 @@
    RCBA32(V0CTL) = 0x80000001;
    RCBA32(V1CAP) = 0x03128010;

+	/* FIXME: RPFN R/WO register and i82801gx/pcie.c try to rewrite */
    RCBA32(RPFN) = 0x00543210;

pci_write_config16(PCI_DEV(0, 0x1c, 0), 0x42, 0x0141);
diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c
index c0f9c12..9d218c7 100644
--- a/src/southbridge/intel/i82801gx/pcie.c
+++ b/src/southbridge/intel/i82801gx/pcie.c
@@ -25,6 +25,7 @@

struct root_port_config {
    /* RPFN is a write-once register so keep a copy until it is written */
+	/* FIXME: already written here intel/i945/early_init.c */
    u32 orig_rpfn;
    u32 new_rpfn;
    int num_ports;