Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38548 )
Change subject: Add Intel SkyLake Scalable Processor support ......................................................................
Patch Set 5:
(33 comments)
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ch... File src/soc/intel/skylake_sp/chip.c:
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ch... PS4, Line 147: res->align, res->gran, res->limit, res->flags, resource_type(res),
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ch... PS4, Line 152: (res->flags & IORESOURCE_PREFETCH) ? " prefetchable " : " non-prefetchable",
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ch... PS4, Line 170: (res->flags & IORESOURCE_PREFETCH) ? " prefetchable " : " non-prefetchable",
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ch... PS4, Line 314: if (first) { /* this bridge doesn't have any resources, will set it to default window */
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ch... PS4, Line 385: res->base, res->limit, (bridge ? resource_type(res) : ""));
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ch... PS4, Line 412: flags[0] = bridge->flags & (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH);
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ch... PS4, Line 413: if ((bridge->flags & IORESOURCE_MEM) && (bridge->flags & IORESOURCE_PREFETCH))
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ch... PS4, Line 437: ((res->flags & (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PCI64
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ch... PS4, Line 540: link->secondary, stack->BusBase, stack->BusLimit, stack->PciResourceIoBase,
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ch... PS4, Line 601: if (stack_info.sres[s].BusBase == 0) /* only non zero bus no. needs to be enumerated */
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ch... PS4, Line 621: printk(BIOS_WARNING, "IIO Stack device %s not visible\n", dev_path(&dummy));
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/cp... File src/soc/intel/skylake_sp/cpu.c:
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/cp... PS4, Line 182: {X86_VENDOR_INTEL, CPUID_SKYLAKESP_A0_A1}, /* Skylake-SP A0/A1 CPUID 0x506f0*/
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ho... File src/soc/intel/skylake_sp/hob_display.c:
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ho... PS4, Line 97: e, mem_element->BaseAddress, mem_element->ElementSize, mem_element->Type);
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ho... PS4, Line 182: printk(BIOS_DEBUG, "\tSocketID: 0x%x\n", hob->PlatformData.IIO_resource[s].SocketID);
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ho... PS4, Line 183: printk(BIOS_DEBUG, "\tBusBase: 0x%x\n", hob->PlatformData.IIO_resource[s].BusBase);
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ho... PS4, Line 184: printk(BIOS_DEBUG, "\tBusLimit: 0x%x\n", hob->PlatformData.IIO_resource[s].BusLimit);
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ho... PS4, Line 208: printk(BIOS_DEBUG, "\t\tPciResourceIoBase: 0x%x\n", ri->PciResourceIoBase);
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ho... PS4, Line 209: printk(BIOS_DEBUG, "\t\tPciResourceIoLimit: 0x%x\n", ri->PciResourceIoLimit);
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ho... PS4, Line 226: p, hob->PlatformData.IIO_resource[s].PcieInfo.PortInfo[p].Device,
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/ho... PS4, Line 227: hob->PlatformData.IIO_resource[s].PcieInfo.PortInfo[p].Function);
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/in... File src/soc/intel/skylake_sp/include/soc/msr.h:
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/in... PS4, Line 27: printk(BIOS_DEBUG, "msr %s (0x%x) 0x%x%08x\n", #id, id, msr.hi, msr.lo); \
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/in... File src/soc/intel/skylake_sp/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/in... PS4, Line 26: fmt, ((u32)dev >> 20) & 0xfff, ((u32)dev >> 15) & 0x1f, ((u32)dev >> 12) & 0x07, \
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/in... PS4, Line 31: fmt, ((u32)dev >> 20) & 0xfff, ((u32)dev >> 15) & 0x1f, ((u32)dev >> 12) & 0x07, \
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/in... File src/soc/intel/skylake_sp/include/soc/soc_util.h:
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/in... PS4, Line 26: printk(BIOS_SPEW, "%s:%d res: %s, dev: %s, index: 0x%x, base: 0x%llx, end: 0x%llx, size_kb: 0x%llx\n", \
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/in... PS4, Line 31: printk(BIOS_SPEW, "%s:%d res: %s, dev: %s, index: 0x%x, base: 0x%llx, end: 0x%llx, size: 0x%llx\n", \
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/un... File src/soc/intel/skylake_sp/uncore.c:
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/un... PS4, Line 151: * |PCIe MMCFG (relocatable) | CONFIG_MMCONF_BASE_ADDRESS 64 or 256MB (0x80000000 - 0x8fffffff, 0x40000)
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/un... PS4, Line 191: printk(BIOS_SPEW, "cbmem_top: 0x%lx, fsp range: [0x%llx - 0x%llx], top_of_ram: 0x%llx\n", (uintptr_t) cbmem_top(),
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/un... PS4, Line 192: range_entry_base(&fsp_mem), range_entry_end(&fsp_mem), top_of_ram);
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/un... PS4, Line 227: base_kb = (range_entry_base(&fsp_mem) + (range_entry_end(&fsp_mem) - range_entry_base(&fsp_mem) + 1)) >> 10;
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/un... PS4, Line 257: resource->size = (resource_t) (mc_values[MMCFG_LIMIT_REG] - mc_values[MMCFG_BASE_REG] + 1);
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/un... PS4, Line 260: LOG_MEM_RESOURCE("mmiocfg_res", dev, index-1, (resource->base >> 10), (resource->size >> 10));
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/un... PS4, Line 268: LOG_MEM_RESOURCE("apic_res", dev, index-1, (resource->base >> 10), (resource->size >> 10));
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Done
https://review.coreboot.org/c/coreboot/+/38548/4/src/soc/intel/skylake_sp/un... PS4, Line 303: LOG_MEM_RESOURCE("APEI_ERST", dev, index-1, (resource->base >> 10), (resource->size >> 10));
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Done