Tyler Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85022?usp=email )
Change subject: mb/google/rex/var/kanix: Add support for USB A1 port ......................................................................
mb/google/rex/var/kanix: Add support for USB A1 port
BUG=b:366291025 TEST=emerge-rex coreboot pass
Change-Id: Ie76b20cab9e15a1944451697ebf243c0f0cc4740 --- M src/mainboard/google/rex/variants/kanix/overridetree.cb 1 file changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/85022/1
diff --git a/src/mainboard/google/rex/variants/kanix/overridetree.cb b/src/mainboard/google/rex/variants/kanix/overridetree.cb index c1d026b..4e3ae1c 100644 --- a/src/mainboard/google/rex/variants/kanix/overridetree.cb +++ b/src/mainboard/google/rex/variants/kanix/overridetree.cb @@ -2,10 +2,12 @@
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0 + register "usb2_ports[7]" = "USB2_PORT_MID(OC0)" # Type-A Port A1 register "usb2_ports[8]" = "USB2_PORT_MID(OC3)" # Type-A Port A0 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Bluetooth
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC3)" # USB3/2 Type A port A0 + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" # USB3/2 Type A port A1
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)" # USB3_C0 register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC_SKIP)" # USB3_C1 @@ -289,6 +291,13 @@ device ref usb2_port2 on end end chip drivers/usb/acpi + register "desc" = ""USB2 Type-A Port A1 (DB)"" + register "type" = "UPC_TYPE_A" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))" + device ref usb2_port8 on end + end + chip drivers/usb/acpi register "desc" = ""USB2 Type-A Port A0 (DB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" @@ -308,6 +317,13 @@ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref usb3_port1 on end end + chip drivers/usb/acpi + register "desc" = ""USB3 Type-A Port A1 (DB)"" + register "type" = "UPC_TYPE_USB3_A" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))" + device ref usb3_port2 on end + end end end end