Attention is currently required from: Ravi kumar, Martin Roth, Paul Menzel, Ravi Kumar Bokka, mturney mturney. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45205 )
Change subject: sc7280: Provide initial SoC support ......................................................................
Patch Set 36:
(2 comments)
File src/soc/qualcomm/common/qclib.c:
https://review.coreboot.org/c/coreboot/+/45205/comment/31136ae6_a1596b1e PS36, Line 159: Something isn't right here... you're adding this to common/qclib.c but I don't see you removing it from sc7180/qclib.c. You still need to keep sc7180 working when you add sc7280 stuff or factor code out into common.
Please do the "factoring out into common" stuff in a separate patch preceding this one, and then the "add sc7280 support" patch should really only contain sc7280 stuff.
File src/soc/qualcomm/sc7280/qclib.c:
https://review.coreboot.org/c/coreboot/+/45205/comment/5feb9019_690fc431 PS36, Line 14: QCLIB_FR_LIMITS_CFG_DATA Just to double-check, we are sure that the limits_cfg data will never need to be updated throughout the lifetime of the device after it was initially written in the factory, right? Because right now this is defined as an RO flash section. For the DDR training data on Trogdor we also originally started with the assumption that it would never need to be updated and then changed our mind later, so I want to make sure we think about this from the start for this one.