Lean Sheng Tan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63410 )
Change subject: mb/prodrive/atlas: Update correct SPD address ......................................................................
mb/prodrive/atlas: Update correct SPD address
Update the SPD address as Atlas is using DIMM 0 & 1 in memory controller 1 channel 1.
Signed-off-by: Lean Sheng Tan sheng.tan@9elements.com Change-Id: Icefcd23b57a7f97e1ee25fed20b35d0e2cb51145 --- M src/mainboard/prodrive/atlas/romstage_fsp_params.c 1 file changed, 1 insertion(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/63410/1
diff --git a/src/mainboard/prodrive/atlas/romstage_fsp_params.c b/src/mainboard/prodrive/atlas/romstage_fsp_params.c index bd4c0a3..8aaef5b 100644 --- a/src/mainboard/prodrive/atlas/romstage_fsp_params.c +++ b/src/mainboard/prodrive/atlas/romstage_fsp_params.c @@ -35,11 +35,7 @@ const struct mem_spd dimm_module_spd_info = { .topo = MEM_TOPO_DIMM_MODULE, .smbus = { - [0] = { - .addr_dimm[0] = 0x50, - .addr_dimm[1] = 0x51, - }, - [1] = { + [3] = { .addr_dimm[0] = 0x52, .addr_dimm[1] = 0x53, },