[coreboot-gerrit] Change in coreboot[master]: mb/intel/jasperlake_rvp: Disable SATA support for JSL

[Usha P (Code Review)]

Usha P has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38996 )

Change subject: mb/intel/jasperlake_rvp: Disable SATA support for JSL
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mb/intel/jasperlake_rvp: Disable SATA support for JSL

This patch disables the SATA config from devicetree for JSL

Change-Id: I9cbcbf96e70b79bfb60f228b77a1065c26cd1aa2
Signed-off-by: Usha P 
---
M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
1 file changed, 1 insertion(+), 19 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/38996/1

diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
index 843de14..2700a41 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
@@ -66,25 +66,7 @@
    # ClkReq-to-ClkSrc mapping for CLK SRC 0
    register "PcieClkSrcClkReq[0]" = "0x00"

-	register "SataEnable" = "1"
-	register "SataSalpSupport" = "1"
-	register "SataPortsEnable[0]" = "1"
-	register "SataPortsEnable[1]" = "1"
-	register "SataPortsEnable[2]" = "1"
-	register "SataPortsEnable[3]" = "1"
-	register "SataPortsEnable[4]" = "1"
-	register "SataPortsEnable[5]" = "1"
-	register "SataPortsEnable[6]" = "1"
-	register "SataPortsEnable[7]" = "1"
-
-	register "SataPortsDevSlp[0]" = "1"
-	register "SataPortsDevSlp[1]" = "1"
-	register "SataPortsDevSlp[2]" = "1"
-	register "SataPortsDevSlp[3]" = "1"
-	register "SataPortsDevSlp[4]" = "1"
-	register "SataPortsDevSlp[5]" = "1"
-	register "SataPortsDevSlp[6]" = "1"
-	register "SataPortsDevSlp[7]" = "1"
+	register "SataEnable" = "0"

register "SerialIoI2cMode" = "{
    	[PchSerialIoIndexI2C0]  = PchSerialIoPci,