3 Apr
2021
3 Apr
'21
8:32 p.m.
Attention is currently required from: Nico Huber, Arthur Heymans, Michael Niewöhner, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52073 )
Change subject: nb/intel/i945/raminit.c: Replace `DIMM0` ......................................................................
Patch Set 1:
(1 comment)
File src/northbridge/intel/i945/raminit.c:
https://review.coreboot.org/c/coreboot/+/52073/comment/e31a2fa7_f6bfc467 PS1, Line 48: 0x50
hm, is that really "more informative"? I'd keep DIMM0
There's no rule saying that SPD index 0x50 is DIMM0. On BTX mainboards, DIMM0's SPD is often at address 0x53.
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