Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45055 )
Change subject: soc/amd/picasso: Fix TSC frequency calculation
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Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45055/1/src/soc/amd/picasso/tsc_fre...
File src/soc/amd/picasso/tsc_freq.c:
https://review.coreboot.org/c/coreboot/+/45055/1/src/soc/amd/picasso/tsc_fre...
PS1, Line 29: mhz = 0;
If it’s an condition, that shouldn’t happen, I think at least a warning or notice should be printed.
I suspect it could theoretically be possible in pre-production silicon, given a broken part, the right fuse recipe, etc., and that's why AGESA builds in certain contingencies.
I recommend calculating the correct frequency. And if that's not possible (for any reason) print an appropriate message and return a conservative number, i.e. still attempt to boot.
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