build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35225 )
Change subject: soc/intel/common/block/cse: Move me_read_config32() to common code ......................................................................
Patch Set 1:
(15 comments)
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 516: if (!CONFIG(CONSOLE_SERIAL)) that open brace { should be on the previous line
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 520: if( offset == PCI_ME_HFSTS1) space prohibited after that open parenthesis '('
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 520: if( offset == PCI_ME_HFSTS1) space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... File src/soc/intel/common/block/include/intelblocks/cse.h:
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 67: PCI_ME_HFSTS1 = 0x40, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 67: PCI_ME_HFSTS1 = 0x40, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 68: PCI_ME_HFSTS2 = 0x48, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 68: PCI_ME_HFSTS2 = 0x48, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 69: PCI_ME_HFSTS3 = 0x60, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 69: PCI_ME_HFSTS3 = 0x60, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 70: PCI_ME_HFSTS4 = 0x64, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 70: PCI_ME_HFSTS4 = 0x64, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 71: PCI_ME_HFSTS5 = 0x68, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 71: PCI_ME_HFSTS5 = 0x68, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 72: PCI_ME_HFSTS6 = 0x6C, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/35225/1/src/soc/intel/common/block/... PS1, Line 72: PCI_ME_HFSTS6 = 0x6C, please, no spaces at the start of a line