Hello Naresh Solanki, Subrata Banik, Balaji Manigandan, Aamir Bohra, Maulik V Vaghela, Rizwan Qureshi,
I'd like you to do a code review. Please visit
https://review.coreboot.org/25226
to review the following change.
Change subject: drivers/intel/fsp2_0: Add support for FSP tempraminit ......................................................................
drivers/intel/fsp2_0: Add support for FSP tempraminit
Change-Id: I481af96ab8e9e45db2788bffb009e307bf5e7e44 Signed-off-by: Ng Kin Wai kin.wai.ng@intel.com --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/Makefile.inc 2 files changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/25226/1
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig old mode 100644 new mode 100755 index 1ff8aa6..8f484c1 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -53,6 +53,20 @@ Display the user specified product data prior to memory initialization.
+config CPU_MICROCODE_CBFS_LEN + hex "Microcode update region length in bytes" + depends on FSP_CAR + default 0 + help + The length in bytes of the microcode update region. + +config CPU_MICROCODE_CBFS_LOC + hex "Microcode update base address in CBFS" + depends on FSP_CAR + default 0 + help + The location (base address) in CBFS that contains the microcode update binary. + config FSP_T_CBFS string "Name of FSP-T in CBFS" depends on FSP_CAR diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc old mode 100644 new mode 100755 index d5709ad..9d6b7db --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -52,6 +52,7 @@ cbfs-files-$(CONFIG_FSP_CAR) += $(CONFIG_FSP_T_CBFS) $(CONFIG_FSP_T_CBFS)-file := $(call strip_quotes,$(CONFIG_FSP_T_FILE)) $(CONFIG_FSP_T_CBFS)-type := fsp +$(CONFIG_FSP_T_CBFS)-options := --xip
cbfs-files-$(CONFIG_ADD_FSP_BINARIES) += $(CONFIG_FSP_M_CBFS) $(CONFIG_FSP_M_CBFS)-file := $(call strip_quotes,$(CONFIG_FSP_M_FILE))