Christopher Douglass (cdouglass.orion@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5226
-gerrit
commit 61817ed316fb7328cf78299fee4a08d0d427d09a Author: Chris Douglass cdouglass.orion@gmail.com Date: Fri Feb 14 13:51:52 2014 -0500
add PCI IDs for Intel 6-Series PCH
The PCI ids are taken from Intel document 440377
Change-Id: Ib8418173fd36fd4109b3c4ec0d5543ca8e39ffa6 Signed-off-by: Christopher Douglass cdouglass.orion@gmail.com --- src/northbridge/intel/sandybridge/report_platform.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/src/northbridge/intel/sandybridge/report_platform.c b/src/northbridge/intel/sandybridge/report_platform.c index cc74841..856ba99 100644 --- a/src/northbridge/intel/sandybridge/report_platform.c +++ b/src/northbridge/intel/sandybridge/report_platform.c @@ -59,11 +59,30 @@ static void report_cpu_info(void) mode[aes], mode[txt], mode[vt]); }
-/* The PCI id name match comes from Intel document 472178 */ static struct { u16 dev_id; const char *dev_name; } pch_table [] = { + /* 6-series PCI ids from Intel document 440377 */ + {0x1C41, "SFF Sample"}, + {0x1C42, "Desktop Sample"}, + {0x1C43, "Mobile Sample"}, + {0x1C44, "Z68"}, + {0x1C46, "P67"}, + {0x1C47, "UM67"}, + {0x1C49, "HM65"}, + {0x1C4A, "H67"}, + {0x1C4B, "HM67"}, + {0x1C4C, "Q65"}, + {0x1C4D, "QS67"}, + {0x1C4E, "Q67"}, + {0x1C4F, "QM67"}, + {0x1C50, "B65"}, + {0x1C52, "C202"}, + {0x1C54, "C204"}, + {0x1C56, "C206"}, + {0x1C5C, "H61"}, + /* 7-series PCI ids from Intel document 472178 */ {0x1E41, "Desktop Sample"}, {0x1E42, "Mobile Sample"}, {0x1E43, "SFF Sample"},