3 Apr
2021
3 Apr
'21
7:51 p.m.
Attention is currently required from: Nico Huber, Matt DeVillier, Tim Wawrzynczak, Michael Niewöhner, Patrick Rudolph. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50754 )
Change subject: soc/intel/common: Prevent SMI storm when setting SPI WPD bit ......................................................................
Patch Set 13:
(1 comment)
Patchset:
PS1:
All datasheets I looked at say LPC BIOS_CNTL is 8 bits, and […]
Forget what I wrote... it's completely wrong ;-) (I confused F0 vs. F5 and also looked at wrong places in the ds)
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Iec498674ae70f6590c33a6bf4967876268f2b0c8
Gerrit-Change-Number: 50754
Gerrit-PatchSet: 13
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