Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40484 )
Change subject: nb/amd/agesa: read 256 bytes to SPD buffer instead of 128 ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/40484/1/src/northbridge/amd/agesa/f... File src/northbridge/amd/agesa/family14/dimmSpd.c:
https://review.coreboot.org/c/coreboot/+/40484/1/src/northbridge/amd/agesa/f... PS1, Line 44: int err = smbus_readSpd(spdAddress, (void *) info->Buffer, 256);
Maybe CONFIG_DIMM_SPD_SIZE isn't needed: regardless of if a particular DDR3 RAM stick provides the X […]
Some of the boards may rely on 128 bytes of SPD. Have you checked those?