Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44804 )
Change subject: mb/google/vilboz: update telemetry settings ......................................................................
mb/google/vilboz: update telemetry settings
update the telemetry setting for second SDLE testing(for APU power adjusting). Those values are used to power calibration the APU power and achieving the best performance.
BUG=b:160698427 BRANCH=zork TEST=emerge-zork coreboot
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: I4cf5b8f090befd6a3c4990f44f2f200bc66aa1f4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44804 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/zork/variants/vilboz/overridetree.cb 1 file changed, 4 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb index d415de5..3d9ff7c 100644 --- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb @@ -18,10 +18,10 @@
# End : OPN Performance Configuration
- register "telemetry_vddcr_vdd_slope" = "32453" #mA - register "telemetry_vddcr_vdd_offset" = "168" - register "telemetry_vddcr_soc_slope" = "22644" #mA - register "telemetry_vddcr_soc_offset" = "-70" + register "telemetry_vddcr_vdd_slope" = "32643" #mA + register "telemetry_vddcr_vdd_offset" = "208" + register "telemetry_vddcr_soc_slope" = "22742" #mA + register "telemetry_vddcr_soc_offset" = "-83"
# USB OC pin mapping register "usb_port_overcurrent_pin[1]" = "USB_OC_NONE" # LTE instead of USB C1