[coreboot-gerrit] Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS

[Sean Rhodes (Code Review)]

Attention is currently required from: Tim Crawford, SRIDHAR SIRICILLA, Furquan Shaikh, Paul Menzel, Rizwan Qureshi, Tim Wawrzynczak, Angel Pons, Subrata Banik, Sridhar Siricilla, Arthur Heymans, Evgeny Zinoviev, Patrick Rudolph.
Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52800 )

Change subject: soc/intel: Allow enable/disable ME via CMOS
......................................................................

Patch Set 74:

(8 comments)

File src/soc/intel/common/block/cse/cse.c:

https://review.coreboot.org/c/coreboot/+/52800/comment/cb64a528_c3c86678 
PS74, Line 998: 			set_uint_option("me_state_counter", me_state_counter);
> Writing the option could fail, but I'm not sure how to handle this.

What could cause it to fail?

https://review.coreboot.org/c/coreboot/+/52800/comment/b23650a5_04e43c98 
PS74, Line 999: %d
> %u

Done

https://review.coreboot.org/c/coreboot/+/52800/comment/9e7b0a48_9c9709bd 
PS74, Line 1007: ;
> Not needed

Done

https://review.coreboot.org/c/coreboot/+/52800/comment/2ebbd6fc_212ee832 
PS74, Line 1020: %d
> %u

Done

https://review.coreboot.org/c/coreboot/+/52800/comment/9dde757f_28236460 
PS74, Line 1038: cse_is_hfs1_com_soft_temp_disable()
> I'd store the result in a constant to avoid calling this function twice

Done

https://review.coreboot.org/c/coreboot/+/52800/comment/a7574f5b_7843b5f5 
PS74, Line 1053: (me_state_counter != UINT_MAX) && (me_state_counter != 0)
> inner braces not needed: […]

Done

https://review.coreboot.org/c/coreboot/+/52800/comment/ac1ad5a8_74490e12 
PS74, Line 1056: ;
> Not needed

Done

https://review.coreboot.org/c/coreboot/+/52800/comment/007693b2_72676692 
PS74, Line 1059: 	printk(BIOS_DEBUG, "HECI: Sending command to change state\n");
> This message is misleading, the command was sent earlier. I'd just remove it.

Done