Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62087 )
Change subject: cpu/amd/family_10h-family_15h/cache_as_ram.S: Remove MMCONF setup ......................................................................
cpu/amd/family_10h-family_15h/cache_as_ram.S: Remove MMCONF setup
The PCI MMCONF setup will be done in C code. There is no need to bloat the assembly here.
Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com Change-Id: Iebe4112fa0afe80bc0d6099fa930cb754411afdc --- M src/cpu/amd/family_10h-family_15h/cache_as_ram.S 1 file changed, 0 insertions(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/62087/1
diff --git a/src/cpu/amd/family_10h-family_15h/cache_as_ram.S b/src/cpu/amd/family_10h-family_15h/cache_as_ram.S index 076f2d8..70f1b01 100644 --- a/src/cpu/amd/family_10h-family_15h/cache_as_ram.S +++ b/src/cpu/amd/family_10h-family_15h/cache_as_ram.S @@ -124,41 +124,6 @@ wrmsr
CAR_FAM10_errata_applied: - -#if CONFIG(MMCONF_SUPPORT) - #if (CONFIG_MMCONF_BASE_ADDRESS > 0xFFFFFFFF) - #error "MMCONF_BASE_ADDRESS too big" - #elif (CONFIG_MMCONF_BASE_ADDRESS & 0xFFFFF) - #error "MMCONF_BASE_ADDRESS not 1MB aligned" - #endif - movl $0, %edx - movl $((CONFIG_MMCONF_BASE_ADDRESS) | (1 << 0)), %eax - #if (CONFIG_MMCONF_BUS_NUMBER == 1) - #elif (CONFIG_MMCONF_BUS_NUMBER == 2) - orl $(1 << 2), %eax - #elif (CONFIG_MMCONF_BUS_NUMBER == 4) - orl $(2 << 2), %eax - #elif (CONFIG_MMCONF_BUS_NUMBER == 8) - orl $(3 << 2), %eax - #elif (CONFIG_MMCONF_BUS_NUMBER == 16) - orl $(4 << 2), %eax - #elif (CONFIG_MMCONF_BUS_NUMBER == 32) - orl $(5 << 2), %eax - #elif (CONFIG_MMCONF_BUS_NUMBER == 64) - orl $(6 << 2), %eax - #elif (CONFIG_MMCONF_BUS_NUMBER == 128) - orl $(7 << 2), %eax - #elif (CONFIG_MMCONF_BUS_NUMBER == 256) - orl $(8 << 2), %eax - #else - #error "bad MMCONF_BUS_NUMBER value" - #endif - movl $MMIO_CONF_BASE, %ecx - wrmsr -#endif - -CAR_FAM10_out_post_errata: - /* Fam15h APIC IDs do not depend on NB config bit 54 */ jmp_if_not_fam15h(skip_nb54_set) movl $NB_CFG_MSR, %ecx