[coreboot-gerrit] Change in coreboot[master]: mb/google/hatch: Initialize SSD GPIOs in bootblock

[Shelley Chen (Code Review)]

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34484 )

Change subject: mb/google/hatch: Initialize SSD GPIOs in bootblock
......................................................................

mb/google/hatch: Initialize SSD GPIOs in bootblock

Moving these to bootblock as we are seeing some instances where
devices are rebooting into the broken screen with the 0x5a error (no
storage device detected).  This needed to be done for KBL platforms
and never got transferred to hatch.

BUG=b:137681648
BRANCH=None
TEST=Run faft_bios

Change-Id: I8cf09c26d77d890f5d0490709504e9edf485a93f
Signed-off-by: Shelley Chen 
---
M src/mainboard/google/hatch/variants/baseboard/gpio.c
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/34484/1

diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index c202f5c..e6cae15 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -439,6 +439,12 @@
    PAD_CFG_GPI_APIC(GPP_C21, NONE, PLTRST, LEVEL, INVERT),
    /* C23 : WLAN_PE_RST# */
    PAD_CFG_GPO(GPP_C23, 1, DEEP),
+	/* E1  : M2_SSD_PEDET */
+	PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1),
+	/* E4  : M2_SSD_PE_WAKE_ODL */
+	PAD_CFG_GPI(GPP_E4, NONE, DEEP),
+	/* E5  : SATA_DEVSLP1 */
+	PAD_CFG_NF(GPP_E5, NONE, PLTRST, NF1),
    /* F2  : MEM_CH_SEL */
    PAD_CFG_GPI(GPP_F2, NONE, PLTRST),
    /* F11 : PCH_MEM_STRAP2 */