[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/sata: Fix SATA detection issue between Ports 3-7

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41674 )

Change subject: soc/intel/common/block/sata: Fix SATA detection issue between Ports 3-7
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Patch Set 4:
> Patch Set 1:
> > Patch Set 1:
> >
> > Did you compare testing results between CML-H and other platforms like SKL/KBL-H?
>
> Yes, SHL/KBL H also has total 8 SATA port. The only difference is SPD bit definitions there. thats we have already handled like this
>
> https://github.com/coreboot/coreboot/blob/master/src/soc/intel/common/block/...
>
> Difference between H and LP would be for SATA, LP has 0-2 implemented and rest 3-7 reserved.
> > I wonder why I had no problems with this on X11SSM-F (100series PCH-H) so far
>
> May your SATA direct connect Port is between 0-2, else you would also see this issue for sure.

I have 8 SATA Ports and use 2-6 and there are no problems