[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Add support to disable Cnvi/PCIe WLAN dynamically

[Maulik V Vaghela (Code Review)]

Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30611 )

Change subject: soc/intel/cannonlake: Add support to disable Cnvi/PCIe WLAN dynamically
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Patch Set 7:

Hi Furquan/Arthur,

I have checked the bug for which this change was introduced on octopus. In case of octopus, it was creating ssdt entry for CNVi as well as PCIe WLAN and that was the reason, we had to disable device in mainboard.
In case of hatch, PCI resource allocator will disable device itself if CNVi module is not connected and ACPI tables are generated after PCI enumeration process. Since device is disabled, SSDT entry won't be generated and hence we don't need this change here. I have also tested this change on our RVP board and I have also dumped SSDT file and checked for the WIFI entry.
1. No module connected : There is no entry for WIFI in SSDT file.
2. CNVi module connected: Single ASL entry for "WIFI" found with root port 14.3 (_SB.PCI0)
3. PCIe WLAN module connected:Single ASL entry for "WIFI" found with RP9 (_SB.PCI0.RP09)

I will abandon this patch for this reason.
Please let me know your inputs.