[coreboot-gerrit] Change in coreboot[master]: arch/x86/spinlock.h: Support systems with >128 cores

[Arthur Heymans (Code Review)]

Attention is currently required from: Arthur Heymans.
Hello Arthur Heymans,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/60539

to review the following change.

Change subject: arch/x86/spinlock.h: Support systems with >128 cores
......................................................................

arch/x86/spinlock.h: Support systems with >128 cores

Each time the spinlock is acquired a bytes is decreased and then the
sign of the byte is checked. If there are more than 128 cores the sign
check will overflow. An easy fix is to increase the word size of the
spinlock acquiring and releasing.

Change-Id: I76afaa60669335090743d99381280e74aa9fb5b1
Signed-off-by: Arthur Heymans 
---
M src/arch/x86/include/arch/smp/spinlock.h
1 file changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/60539/1

diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h
index c7008c1..713485e 100644
--- a/src/arch/x86/include/arch/smp/spinlock.h
+++ b/src/arch/x86/include/arch/smp/spinlock.h
@@ -31,11 +31,11 @@

#define spin_lock_string \
    "\n1:\t" \
-	"lock ; decb %0\n\t" \
+	"lock ; decl %0\n\t" \
    "js 2f\n" \
    ".section .text.lock,"ax"\n" \
    "2:\t" \
-	"cmpb $0,%0\n\t" \
+	"cmpl $0,%0\n\t" \
    "rep;nop\n\t" \
    "jle 2b\n\t" \
    "jmp 1b\n" \
@@ -45,7 +45,7 @@
  * This works. Despite all the confusion.
  */
 #define spin_unlock_string \
-	"movb $1,%0"
+	"movl $1,%0"

static __always_inline void spin_lock(spinlock_t *lock)
 {