[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Update pci dev definition

[Wonkyu Kim (Code Review)]

Hello Srinidhi N Kaushik, Patrick Rudolph, Subrata Banik, Nick Vaccaro, caveh jalali, Shaunak Saha, build bot (Jenkins), Furquan Shaikh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38341

to look at the new patch set (#7).

Change subject: soc/intel/tigerlake: Update pci dev definition
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soc/intel/tigerlake: Update pci dev definition

This change updates pci dev definition according to TGL EDS
Add GSPI3 case in chip.c according to update pci dev definitions

Reference
TGL Process EDS#575681 rev1.0
TGL PCH EDS#576591 rev1.2

BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board

Signed-off-by: Wonkyu Kim 
Change-Id: I4717ac3cc877b13978b18ada504740512f10c709
---
M src/soc/intel/tigerlake/chip.c
M src/soc/intel/tigerlake/finalize.c
M src/soc/intel/tigerlake/include/soc/pci_devs.h
3 files changed, 40 insertions(+), 56 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/38341/7