Hello Srinidhi N Kaushik, Patrick Rudolph, Subrata Banik, Nick Vaccaro, caveh jalali, Shaunak Saha, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38341
to look at the new patch set (#6).
Change subject: soc/intel/tigerlake: update pci dev definition ......................................................................
soc/intel/tigerlake: update pci dev definition
Update pci dev definition according to TGL EDS Add GSPI3 case in chip.c
Reference TGL Process EDS#575681 rev1.0 TGL PCH EDS#576591 rev1.2
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4717ac3cc877b13978b18ada504740512f10c709 --- M src/soc/intel/tigerlake/chip.c M src/soc/intel/tigerlake/finalize.c M src/soc/intel/tigerlake/include/soc/pci_devs.h 3 files changed, 40 insertions(+), 56 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/38341/6