[coreboot-gerrit] [L] Change in coreboot[main]: soc/intel/xeon_sp/spr: Support dynamic domain SSDT generation

[Shuo Liu (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu.

Hello Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/81377?usp=email

to look at the new patch set (#16).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: soc/intel/xeon_sp/spr: Support dynamic domain SSDT generation
......................................................................

soc/intel/xeon_sp/spr: Support dynamic domain SSDT generation

Domain SSDT is dynamically generated by soc_pci_domain_fill_ssdt.

SPR has 2 SKUs, XCC and MCC. Dynamic domain SSDT generation could
better fit both. One possible side-effect might be the extra
performance cost for generating these tables, which should not bring
big impact on high performance server CPUs.

TEST=intel/archercity CRB

Linux ACPI host bridge parsing logs are kept the same before and
after, with some minor issue fixed.

Change-Id: Icc5843feadc840d87c49b2aa4259716264520dba
Signed-off-by: Shuo Liu 
---
M src/soc/intel/xeon_sp/chip_gen1.c
D src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl
D src/soc/intel/xeon_sp/spr/acpi/dino_resource.asl
D src/soc/intel/xeon_sp/spr/acpi/iiostack.asl
D src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl
D src/soc/intel/xeon_sp/spr/acpi/ubox_resource.asl
M src/soc/intel/xeon_sp/spr/acpi/uncore.asl
M src/soc/intel/xeon_sp/spr/ioat.c
M src/soc/intel/xeon_sp/spr/soc_acpi.c
M src/soc/intel/xeon_sp/util.c
10 files changed, 103 insertions(+), 321 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/81377/16