[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Only reserve TPM area for !CONFIG_TPM_CR50 device

[Subrata Banik (Code Review)]

Hello Patrick Rudolph, Angel Pons, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38512

to look at the new patch set (#3).

Change subject: soc/intel/skylake: Only reserve TPM area for !CONFIG_TPM_CR50 device
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soc/intel/skylake: Only reserve TPM area for !CONFIG_TPM_CR50 device

The TPM description contains the base address of the TIS interface 0xfed40000
and the size of the MMIO area is 20KB (0x5000).

TEST=Build and boot EVE and Soraka to OS.

Change-Id: Id02a2659ce42f705180370000df89d4f6b64afce
Signed-off-by: Subrata Banik 
---
M src/soc/intel/skylake/acpi/systemagent.asl
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/38512/3