Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32407 )
Change subject: soc/amd/picasso: Create picasso as a copy of stoneyridge ......................................................................
Patch Set 2:
(108 comments)
Way too many stoney or stoneyridge. I hope I found them all.
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/BiosCallOuts.c File src/soc/amd/picasso/BiosCallOuts.c:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/BiosCallOuts.c@6... PS2, Line 63: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/BiosCallOuts.c@7... PS2, Line 70: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/BiosCallOuts.c@7... PS2, Line 72: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/BiosCallOuts.c@1... PS2, Line 102: stoneyridge picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig File src/soc/amd/picasso/Kconfig:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@16 PS2, Line 16: config SOC_AMD_STONEYRIDGE_FP4 : bool : help : AMD Stoney Ridge FP4 support : : config SOC_AMD_STONEYRIDGE_FT4 : bool : help : AMD Stoney Ridge FT4 support : : if SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 : PICASSO, how many sockets will it support?
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@145 PS2, Line 145: stoneyridge picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@159 PS2, Line 159: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@160 PS2, Line 160: Stoney Ridge Picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@169 PS2, Line 169: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@173 PS2, Line 173: Stoney Ridge Picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@175 PS2, Line 175: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@179 PS2, Line 179: Stoney Ridge Picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@182 PS2, Line 182: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@184 PS2, Line 184: stoneyridge picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@185 PS2, Line 185: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@187 PS2, Line 187: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@189 PS2, Line 189: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@193 PS2, Line 193: stoneyridge picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@195 PS2, Line 195: TONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@211 PS2, Line 211: TONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@214 PS2, Line 214: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@217 PS2, Line 217: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@220 PS2, Line 220: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@223 PS2, Line 223: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@226 PS2, Line 226: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@228 PS2, Line 228: if STONEYRIDGE_SATA_MODE = 2 || STONEYRIDGE_SATA_MODE = 5 PICASSO, 2 places
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@232 PS2, Line 232: default "1022,7801" if STONEYRIDGE_SATA_MODE = 2 : default "1022,7804" if STONEYRIDGE_SATA_MODE = 5 : : endif # STONEYRIDGE_SATA_MODE = 2 || STONEYRIDGE_SATA_MODE = 5 : : config STONEYRIDGE_LEGACY_FREE : PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@250 PS2, Line 250: TONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@257 PS2, Line 257: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/Kconfig@389 PS2, Line 389: SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 PICASSO, how many sockets?
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/acpi.c File src/soc/amd/picasso/acpi.c:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/acpi.c@78 PS2, Line 78: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/acpi/globalnvs.a... File src/soc/amd/picasso/acpi/globalnvs.asl:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/acpi/globalnvs.a... PS2, Line 20: stoneyridg picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/bootblock/bootbl... File src/soc/amd/picasso/bootblock/bootblock.c:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/bootblock/bootbl... PS2, Line 111: STONEYRIDGE_ PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/chip.h File src/soc/amd/picasso/chip.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/chip.h@16 PS2, Line 16: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/chip.h@17 PS2, Line 17: STONEYRIDG PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/chip.h@30 PS2, Line 30: STONEY PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/chip.h@77 PS2, Line 77: stoneyridge picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/chip.h@81 PS2, Line 81: STONEYRIDG PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/chip.c File src/soc/amd/picasso/chip.c:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/chip.c@35 PS2, Line 35: stoneyridge picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/chip.c@150 PS2, Line 150: stoneyridg picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/chip.c@151 PS2, Line 151: StoneyRidge Picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/acpi... File src/soc/amd/picasso/include/soc/acpi.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/acpi... PS2, Line 18: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/acpi... PS2, Line 19: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/acpi... PS2, Line 23: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/acpi... PS2, Line 40: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/cpu.... File src/soc/amd/picasso/include/soc/cpu.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/cpu.... PS2, Line 16: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/cpu.... PS2, Line 17: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/cpu.... PS2, Line 35: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/gpio... File src/soc/amd/picasso/include/soc/gpio.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/gpio... PS2, Line 16: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/gpio... PS2, Line 17: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/gpio... PS2, Line 308: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/i2c.... File src/soc/amd/picasso/include/soc/i2c.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/i2c.... PS2, Line 16: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/i2c.... PS2, Line 17: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/i2c.... PS2, Line 49: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/ioma... File src/soc/amd/picasso/include/soc/iomap.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/ioma... PS2, Line 17: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/ioma... PS2, Line 18: TONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/ioma... PS2, Line 88: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/nort... File src/soc/amd/picasso/include/soc/northbridge.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/nort... PS2, Line 17: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/nort... PS2, Line 18: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/nort... PS2, Line 133: STONEYRID PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/nvs.... File src/soc/amd/picasso/include/soc/nvs.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/nvs.... PS2, Line 20: stoneyridge picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/nvs.... PS2, Line 24: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/nvs.... PS2, Line 25: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/nvs.... PS2, Line 67: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/pci_... File src/soc/amd/picasso/include/soc/pci_devs.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/pci_... PS2, Line 16: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/pci_... PS2, Line 17: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/pci_... PS2, Line 198: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/roms... File src/soc/amd/picasso/include/soc/romstage.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/roms... PS2, Line 16: #ifndef __STONEYRIDGE_ROMSTAGE_H__ PICASSO all over
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/smbu... File src/soc/amd/picasso/include/soc/smbus.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/smbu... PS2, Line 16: __STONEYRIDGE_SMBUS_H__ PICASSO, 3 places
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/smi.... File src/soc/amd/picasso/include/soc/smi.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/smi.... PS2, Line 18: ifndef __SOUTHBRIDGE_AMD_PI_STONEYRIDGE_SMI_H__ : #define __SOUTHBRIDGE_AMD_PI_STONEYRIDGE_SMI_H__ : PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/smi.... PS2, Line 242: __SOUTHBRIDGE_AMD_PI_STONEYRIDGE_SMI_H__ PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/sout... File src/soc/amd/picasso/include/soc/southbridge.h:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/sout... PS2, Line 17: TONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/sout... PS2, Line 18: STONEYRIDG PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/sout... PS2, Line 319: stoneyridge picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/include/soc/sout... PS2, Line 415: __STONEYRIDGE_H__ PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc File src/soc/amd/picasso/makefile.inc:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@30 PS2, Line 30: ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) PICASSO, what socket type?
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@40 PS2, Line 40: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@66 PS2, Line 66: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@78 PS2, Line 78: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@84 PS2, Line 84: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@109 PS2, Line 109: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@125 PS2, Line 125: stoneyridge picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@126 PS2, Line 126: stoneyridge picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@127 PS2, Line 127: stoneyridge picasso
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@138 PS2, Line 138: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@218 PS2, Line 218: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@219 PS2, Line 219: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@238 PS2, Line 238: STONEYRIDG PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@239 PS2, Line 239: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@268 PS2, Line 268: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@276 PS2, Line 276: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@283 PS2, Line 283: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@286 PS2, Line 286: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@292 PS2, Line 292: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/makefile.inc@316 PS2, Line 316: endif # ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) PICASSO, what socket type?
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/northbridge.c File src/soc/amd/picasso/northbridge.c:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/northbridge.c@28... PS2, Line 280: AGESA Will it be AGESA or FSP at the end? same in other places bellow.
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/northbridge.c@35... PS2, Line 350: family15 family17
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/northbridge.c@38... PS2, Line 388: fam1 family17
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/romstage.c File src/soc/amd/picasso/romstage.c:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/romstage.c@110 PS2, Line 110: * TODO: This is a hack to work around current AGESA behavior. : * AGESA needs to change to reflect that coreboot owns : * the MTRRs. : * : * After setting up DRAM, AGESA also completes the configuration : * of the MTRRs, setting regions to WB. Anything written to : * memory between now and and when CAR is dismantled will be : * in cache and lost. For now, set the regions UC to ensure : * the writes get to DRAM. : */ : Really? Say it's a copy from stoney, and that needs to be reviewed in the near future, once AGESA/FSP is solved.
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/southbridge.c File src/soc/amd/picasso/southbridge.c:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/southbridge.c@59 PS2, Line 59: STONEYRIDGE PICASSO
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/southbridge.c@60 PS2, Line 60: STONEYRIDGE same
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/southbridge.c@66 PS2, Line 66: STONEYRIDGE same
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/southbridge.c@67 PS2, Line 67: STONEYRIDG same
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/southbridge.c@73 PS2, Line 73: STONEYRIDGE same
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/southbridge.c@74 PS2, Line 74: STONEYRIDGE same
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/southbridge.c@80 PS2, Line 80: STONEYRIDGE same
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/southbridge.c@94 PS2, Line 94: STONEYRIDGE same
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/tsc_freq.c File src/soc/amd/picasso/tsc_freq.c:
https://review.coreboot.org/#/c/32407/2/src/soc/amd/picasso/tsc_freq.c@33 PS2, Line 33: amily 15h Models 70h-7F Wrong, family 17h models ?