Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48570 )
Change subject: soc/intel/jasperlake: Drop unreferenced devicetree settings ......................................................................
soc/intel/jasperlake: Drop unreferenced devicetree settings
No mainboard uses these settings, nor does SoC code. Drop them.
Change-Id: I40eba4128f1c5bafc7023b28dbaf40c0aca3f490 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/48570 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Michael Niewöhner foss@mniewoehner.de --- M src/soc/intel/jasperlake/chip.h 1 file changed, 0 insertions(+), 9 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h index 2fc32c9..9d4bc5c 100644 --- a/src/soc/intel/jasperlake/chip.h +++ b/src/soc/intel/jasperlake/chip.h @@ -129,22 +129,13 @@ /* Enable if SD Card Power Enable Signal is Active High */ uint8_t SdCardPowerEnableActiveHigh;
- /* Integrated Sensor */ - uint8_t PchIshEnable; - - /* Heci related */ - uint8_t Heci3Enabled; - /* VR Config Settings for IA Core */ uint16_t ImonSlope; uint16_t ImonOffset;
/* Gfx related */ - uint8_t IgdDvmt50PreAlloc; uint8_t SkipExtGfxScan;
- uint32_t GraphicsConfigPtr; - /* HeciEnabled decides the state of Heci1 at end of boot * Setting to 0 (default) disables Heci1 and hides the device from OS */ uint8_t HeciEnabled;