John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40968 )
Change subject: soc/intel/tigerlake: Clear TBT PCIe root ports BME at exit boot service ......................................................................
Patch Set 6:
Patch Set 6:
Cherry-picked this. On my DUT, it got stuck:
Starting depthcharge on Deltan... WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime! WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime! WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime! BIOS MMAP details: IFD Base Offset : 0x1000000 IFD End Offset : 0x2000000 MMAP Size : 0x1000000 MMAP Start : 0xff000000 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff Looking for NVMe Controller 0x32038558 @ 00:1d:00 Wipe memory regions: [0x00000000001000, 0x000000000a0000) [0x00000000100000, 0x00000030000000) [0x0000003263be20, 0x00000076a0f000) [0x00000100000000, 0x00000180400000) xhci_wait_for_command: Command ring still running ===> Stuck here forever!
That sounds irrational as the patch only disables TBT root ports BME. The "xhci_wait_for_command: Command ring still running;" refers to lippayload xhci's CRR check. On our sides, multiple DUT boot reliably to kernel either from nvme or usb after cherry-pick this patch.