[coreboot-gerrit] New patch to review for coreboot: 1a63f0b x86: dynamic cbmem: fix acpi reservations

[Aaron Durbin]

Aaron Durbin ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2897

-gerrit

commit 1a63f0b0fe329cfd2324ccf0a4f918e9317287ee
Author: Aaron Durbin 
Date:   Sat Mar 23 00:12:19 2013 -0500

x86: dynamic cbmem: fix acpi reservations

If a configuration was not using RELOCTABLE_RAMSTAGE, but it
    was using HAVE_ACPI_RESUME then the ACPI memory was not being
    marked as reserved to the OS. The reason is that memory is marked as
    reserved during write_coreboot_table(). These reservations were
    being added to cbmem after the call to write_coreboot_table(). In
    the non-dynamic cbmem case this sequence is fine because cbmem area
    is a fixed size and is already reserved. For the dynamic cbmem case
    that no longer holds by the nature of the dynamic cbmem.

Change-Id: I9aa44205205bfef75a9e7d9f02cf5c93d7c457b2
    Signed-off-by: Aaron Durbin 
---
 src/arch/x86/boot/tables.c | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c
index 4448333..6355a1b 100644
--- a/src/arch/x86/boot/tables.c
+++ b/src/arch/x86/boot/tables.c
@@ -203,6 +203,22 @@ struct lb_memory *write_tables(void)
    }
 #endif

+	post_code(0x9e);
+
+#if CONFIG_HAVE_ACPI_RESUME
+/* Only add CBMEM_ID_RESUME when the ramstage isn't relocatable. */
+#if !CONFIG_RELOCATABLE_RAMSTAGE
+	/* Let's prepare the ACPI S3 Resume area now already, so we can rely on
+	 * it begin there during reboot time. We don't need the pointer, nor
+	 * the result right now. If it fails, ACPI resume will be disabled.
+	 */
+	cbmem_add(CBMEM_ID_RESUME, HIGH_MEMORY_SAVE);
+#endif
+#if CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY14 || CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
+	cbmem_add(CBMEM_ID_RESUME_SCRATCH, CONFIG_HIGH_SCRATCH_MEMORY_SIZE);
+#endif
+#endif
+
 #define MAX_COREBOOT_TABLE_SIZE (32 * 1024)
    post_code(0x9d);

@@ -230,22 +246,6 @@ struct lb_memory *write_tables(void)
    			     rom_table_start, rom_table_end);
    }

-	post_code(0x9e);
-
-#if CONFIG_HAVE_ACPI_RESUME
-/* Only add CBMEM_ID_RESUME when the ramstage isn't relocatable. */
-#if !CONFIG_RELOCATABLE_RAMSTAGE
-	/* Let's prepare the ACPI S3 Resume area now already, so we can rely on
-	 * it begin there during reboot time. We don't need the pointer, nor
-	 * the result right now. If it fails, ACPI resume will be disabled.
-	 */
-	cbmem_add(CBMEM_ID_RESUME, HIGH_MEMORY_SAVE);
-#endif
-#if CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY14 || CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
-	cbmem_add(CBMEM_ID_RESUME_SCRATCH, CONFIG_HIGH_SCRATCH_MEMORY_SIZE);
-#endif
-#endif
-
 #if CONFIG_MULTIBOOT
    post_code(0x9d);