Attention is currently required from: Tarun Tuli, Paul Menzel, Kapil Porwal.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74229 )
Change subject: mb/google/rex: Update Rex Flash Layout to fit WP_RO within 4MB ......................................................................
Patch Set 3:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74229/comment/48a82318_7c15e0bf PS1, Line 9: This patch updates the Rex flash layout to optimize WP_RO to 4MB.
The board was apparently added with 8 MB, so why is it too big now? What optimization is done?
Sorry, I'm still unable to understand what details, u would like to know? we had goal to drop WP_RO from 8MB to 4MB at some point of the program and now we are doing so.
https://review.coreboot.org/c/coreboot/+/74229/comment/3cfaa1d4_61d36603 PS1, Line 9: This patch updates the Rex flash layout to optimize WP_RO to 4MB. : : Changes for chromeos.fmd: : : SI_BIOS: : RW_SECTION_A/B: Reduce to 7MB. : RW_LEGACY: Reduce to 1MB. : RW_MISC: Increased to 1MB. : RW_UNUSED: 3MB (reserved) : WP_RO: Reduce to 4MB : : Additionally, ensure RW_SECTION_B region starts at 16MB boundary in the : SPI Flash.
I am sorry you are feeling this way.
I would like to understand if your intention is code review, then please help on that part. I'm feeling like, u are suggesting something which is not possible and I have explained why so, but still this conversation continues
File src/mainboard/google/rex/chromeos.fmd:
https://review.coreboot.org/c/coreboot/+/74229/comment/e2a53783_9fc4816b PS1, Line 7: 7M
Changing 7092K to 7M is cosmetic, isn’t it?
@Paul, you have to understand every bytes are meaningful here. I can't just drop 92K in one CL without adding those 92K to any other region.