[coreboot-gerrit] Change in ...coreboot[master]: device/pciexp_device: Add set_L1_ss_latency() for pciexp device

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31951 )

Change subject: device/pciexp_device: Add set_L1_ss_latency() for pciexp device
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Patch Set 6:

IMO this is going the wrong direction. Apologies if there was language barrier or confusion, I am not native English.

Now, all you should do is move that _3146US define into pciexp.h and use it instead of the literal 0x10041004. Nothing else for this commit.

I don't know why only one or two platforms set these values. Are we missing some PCIe compliancy here or this errata or tune-up?