[coreboot-gerrit] Patch set updated for coreboot: 0e457fa northbridge/intel/*/mrccache.c: Silence unused func complaints

[Edward O'Callaghan]

Edward O'Callaghan ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5834

-gerrit

commit 0e457fa3465f7be2d840d18638cdc251e7a3ad46
Author: Edward O'Callaghan 
Date:   Sat May 24 04:09:50 2014 +1000

northbridge/intel/*/mrccache.c: Silence unused func complaints

Fixes to Haswell and Sandybridge:
    Clang complains that the function 'to_flash_offset' is unused.

Change-Id: I129cf8349e9ee2ebd4a4d0f69a6d830bdbc4ebf0
    Signed-off-by: Edward O'Callaghan 
---
 src/northbridge/intel/haswell/mrccache.c     | 5 ++++-
 src/northbridge/intel/sandybridge/mrccache.c | 5 ++++-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/northbridge/intel/haswell/mrccache.c b/src/northbridge/intel/haswell/mrccache.c
index 88dbf7f..3e847cd 100644
--- a/src/northbridge/intel/haswell/mrccache.c
+++ b/src/northbridge/intel/haswell/mrccache.c
@@ -33,10 +33,12 @@
 #include <vendorcode/google/chromeos/fmap.h>
 #endif

+#if !defined(__PRE_RAM__)
 /* convert a pointer to flash area into the offset inside the flash */
 static inline u32 to_flash_offset(struct spi_flash *flash, void *p) {
    return ((u32)p + flash->size);
 }
+#endif /* !defined(__PRE_RAM__) */

static struct mrc_data_container *next_mrc_block(
    struct mrc_data_container *mrc_cache)
@@ -124,6 +126,7 @@ static struct mrc_data_container *find_current_mrc_cache_local
 /* SPI code needs malloc/free.
  * Also unknown if writing flash from XIP-flash code is a good idea
  */
+
 #if !defined(__PRE_RAM__)
 /* find the first empty block in the MRC cache area.
  * If there's none, return NULL.
@@ -228,7 +231,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = {
    BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
                          update_mrc_cache, NULL),
 };
-#endif
+#endif /* !defined(__PRE_RAM__) */

struct mrc_data_container *find_current_mrc_cache(void)
 {
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index 5d7c49b..a33a9f3 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -33,10 +33,12 @@
 #include <vendorcode/google/chromeos/fmap.h>
 #endif

+#if !defined(__PRE_RAM__)
 /* convert a pointer to flash area into the offset inside the flash */
 static inline u32 to_flash_offset(struct spi_flash *flash, void *p) {
    return ((u32)p + flash->size);
 }
+#endif /* !defined(__PRE_RAM__) */

static struct mrc_data_container *next_mrc_block(
    struct mrc_data_container *mrc_cache)
@@ -123,6 +125,7 @@ static struct mrc_data_container *find_current_mrc_cache_local
 /* SPI code needs malloc/free.
  * Also unknown if writing flash from XIP-flash code is a good idea
  */
+
 #if !defined(__PRE_RAM__)
 /* find the first empty block in the MRC cache area.
  * If there's none, return NULL.
@@ -227,7 +230,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = {
    BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
                          update_mrc_cache, NULL),
 };
-#endif
+#endif /* !defined(__PRE_RAM__) */

struct mrc_data_container *find_current_mrc_cache(void)
 {