Hello build bot (Jenkins), Nico Huber, Jeremy Soller, Angel Pons, Michael Niewöhner, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/49104
to look at the new patch set (#3).
Change subject: soc/intel/cannonlake: Allow setting PCIe subsystem IDs after FSP SiliconInit ......................................................................
soc/intel/cannonlake: Allow setting PCIe subsystem IDs after FSP SiliconInit
Prevent the FSP from writing the default SVID SDID values for internal devices as this locks the registers. Allows subsystemid values set in devicetree to be used.
A description of this behavior, along with example code, is provided in the TigerLake FSP Integration Guide.
Tested by checking lspci output on System76 galp3-c, oryp5, oryp6.
Change-Id: Ieaa45ef7fa8e0da4a25b9174ded1ea0c5d9c4b4e Signed-off-by: Jeremy Soller jeremy@system76.com Signed-off-by: Tim Crawford tcrawford@system76.com --- M src/soc/intel/cannonlake/fsp_params.c 1 file changed, 50 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/49104/3