Attention is currently required from: Felix Singer, Jeremy Soller, Angel Pons. Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49104 )
Change subject: soc/intel/cannonlake: Allow setting PCIe subsystem IDs after FSP SiliconInit ......................................................................
Patch Set 4:
(2 comments)
File src/soc/intel/cannonlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/49104/comment/1ef3e3dd_3277009b PS2, Line 552: /* Program XHCI SSID/SVID before FSP silicon init */ : dev = pcidev_path_on_root(PCH_DEVFN_XHCI); : if (!dev->subsystem_vendor || !dev->subsystem_device) { : pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, : pci_read_config32(dev, PCI_VENDOR_ID)); : } else { : pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, : ((dev->subsystem_device & 0xffff) << 16) | : (dev->subsystem_vendor & 0xffff)); : } : : /* Program HDAudio SSID/SVID before FSP silicon init */ : dev = pcidev_path_on_root(PCH_DEVFN_HDA); : if (!dev->subsystem_vendor || !dev->subsystem_device) { : pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, : pci_read_config32(dev, PCI_VENDOR_ID)); : } else { : pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, : ((dev->subsystem_device & 0xffff) << 16) | : (dev->subsystem_vendor & 0xffff)); : }
Ah, not all are RW/O... […]
Done
File src/soc/intel/cannonlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/49104/comment/67b6f179_989370f5 PS3, Line 555: if (dev->subsystem_vendor && dev->subsystem_device) { : pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, : ((dev->subsystem_device & 0xffff) << 16) | : (dev->subsystem_vendor & 0xffff)); : } else { : pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, : pci_read_config32(dev, PCI_VENDOR_ID)); : }
This logic is already implemented in `pci_dev_set_subsystem`
Done