Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39043 )
Change subject: [TESTME]lenovo/x220: Attempt to fix broken DRAM init ......................................................................
[TESTME]lenovo/x220: Attempt to fix broken DRAM init
Enable power on WWAN as it has SMBUS connected. Might resolv an issue where DRAM init fails as no EEPROM is found on the bus.
Untested.
Change-Id: Ia7a2ca370124ecf743b000998b56855d5ed8f573 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/ec/lenovo/h8/Makefile.inc M src/mainboard/lenovo/x220/early_init.c 2 files changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/39043/1
diff --git a/src/ec/lenovo/h8/Makefile.inc b/src/ec/lenovo/h8/Makefile.inc index 51c11be..9c8687a 100644 --- a/src/ec/lenovo/h8/Makefile.inc +++ b/src/ec/lenovo/h8/Makefile.inc @@ -18,6 +18,8 @@ ramstage-y += panic.c endif
+romstage += wwan.c + ramstage-y += h8.c ramstage-y += bluetooth.c ramstage-y += wwan.c diff --git a/src/mainboard/lenovo/x220/early_init.c b/src/mainboard/lenovo/x220/early_init.c index 3429c1b..ae16f0c 100644 --- a/src/mainboard/lenovo/x220/early_init.c +++ b/src/mainboard/lenovo/x220/early_init.c @@ -24,6 +24,7 @@ #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> #include <cpu/x86/msr.h> +#include <ec/lenovo/h8/h8.h>
void mainboard_fill_pei_data(struct pei_data *pei_data) { @@ -74,6 +75,18 @@ *pei_data = pei_data_template; }
+void mainboard_early_init(int s3_resume) +{ + /* + * The WWAN slot has SMBUS connected. Turn on power to make sure + * SMBUS is usable and DRAM init will succeed. + * ramstage will turn it off, in case it's not needed. + * TODO: Does GPIO42 (SMB_3B_EN) help here? + */ + if (h8_has_wwan()) + h8_wwan_enable(true); +} + void mainboard_get_spd(spd_raw_data *spd, bool id_only) { read_spd (&spd[0], 0x50, id_only);