[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Disable USB2 PHY Power gating [WIP]

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36519 )

Change subject: soc/intel/cannonlake: Disable USB2 PHY Power gating [WIP]
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Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/36519/3//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/36519/3//COMMIT_MSG@9 
PS3, Line 9: Workaround for an issue seen when a specific charger is connected while
           : in S0ix state
Which charger?  What was the issue that this solves?