Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34173 )
Change subject: sb/intel/common/spi: Increase flash erase timeout
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Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/34173/5//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/34173/5//COMMIT_MSG@9
PS5, Line 9: 200ms
it's 1s now
https://review.coreboot.org/c/coreboot/+/34173/5//COMMIT_MSG@15
PS5, Line 15: operation if the ambient temperature increases. The measured time values are in
Maybe I'm wrong, but Gerrit shows this line as 7 chars too long.
https://review.coreboot.org/c/coreboot/+/34173/5/src/southbridge/intel/commo...
File src/southbridge/intel/common/spi.c:
https://review.coreboot.org/c/coreboot/+/34173/5/src/southbridge/intel/commo...
PS5, Line 733: //unsigned int timeout = 1000 * SPI_FLASH_PROG_TIMEOUT;
please drop
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Id50636f9ed834ffd7810946798b300e58b2c14d2
Gerrit-Change-Number: 34173
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Gerrit-Comment-Date: Wed, 10 Jul 2019 16:07:27 +0000
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