[coreboot-gerrit] Change in coreboot[master]: soc/braswell: hook up smmstore

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39191 )

Change subject: soc/braswell: hook up smmstore
......................................................................

soc/braswell: hook up smmstore

Adapted from implementation in sb/intel/common.

Test: build/boot variants of google/cyan with Tianocore
and SMMSTORE enabled

Change-Id: Ife4681983d0eecbc01c539b477664f3dd8bb9368
Signed-off-by: Matt DeVillier 
---
M src/soc/intel/braswell/smihandler.c
1 file changed, 25 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/39191/1

diff --git a/src/soc/intel/braswell/smihandler.c b/src/soc/intel/braswell/smihandler.c
index 80b142a..31b059c 100644
--- a/src/soc/intel/braswell/smihandler.c
+++ b/src/soc/intel/braswell/smihandler.c
@@ -30,6 +30,7 @@
 #include <spi-generic.h>
 #include <stdint.h>
 #include <soc/gpio.h>
+#include <smmstore.h>

/* GNVS needs to be set by coreboot initiating a software SMI. */
 static global_nvs_t *gnvs;
@@ -279,6 +280,26 @@
    *ret = gsmi_exec(sub_command, param);
 }

+static void southbridge_smi_store(void)
+{
+	u8 sub_command, ret;
+	em64t100_smm_state_save_area_t *io_smi =
+		smi_apmc_find_state_save(APM_CNT_SMMSTORE);
+	uint32_t reg_ebx;
+
+	if (!io_smi)
+		return;
+	/* Command and return value in EAX */
+	sub_command = (io_smi->rax >> 8) & 0xff;
+
+	/* Parameter buffer in EBX */
+	reg_ebx = io_smi->rbx;
+
+	/* drivers/smmstore/smi.c */
+	ret = smmstore_exec(sub_command, (void *)reg_ebx);
+	io_smi->rax = ret;
+}
+
 static void southbridge_smi_apmc(void)
 {
    uint8_t reg8;
@@ -330,6 +351,10 @@
    	if (CONFIG(ELOG_GSMI))
    		southbridge_smi_gsmi();
    	break;
+	case APM_CNT_SMMSTORE:
+		if (CONFIG(SMMSTORE))
+			southbridge_smi_store();
+		break;
    }

mainboard_smi_apmc(reg8);