[coreboot-gerrit] Change in ...coreboot[master]: arch/x86: Adjust size of postcar stack

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded a new patch set (#3) to the change originally created by Mario Scheithauer. ( https://review.coreboot.org/c/coreboot/+/33775 )

Change subject: arch/x86: Adjust size of postcar stack
......................................................................

arch/x86: Adjust size of postcar stack

With VBOOT=y && VBOOT_MEASURED_BOOT=y message
digest will be allocated from the stack and
1 KiB reserve used with the recent platforms
was no longer sufficient.

The comment of LZMA scratchpad consuming stack
was obsolete for postcar, so these can be reduced
to same 4 KiB.

Change-Id: Iba1fb5bfad6946f316feac2d8c998a782142a56a
Signed-off-by: Mario Scheithauer 
Signed-off-by: Kyösti Mälkki 
---
M src/arch/x86/include/arch/cpu.h
M src/cpu/intel/haswell/romstage.c
M src/drivers/intel/fsp1_1/car.c
M src/mainboard/emulation/qemu-i440fx/romstage.c
M src/mainboard/emulation/qemu-q35/romstage.c
M src/northbridge/intel/e7505/memmap.c
M src/northbridge/intel/gm45/ram_calc.c
M src/northbridge/intel/i440bx/ram_calc.c
M src/northbridge/intel/i945/ram_calc.c
M src/northbridge/intel/nehalem/ram_calc.c
M src/northbridge/intel/pineview/ram_calc.c
M src/northbridge/intel/sandybridge/ram_calc.c
M src/northbridge/intel/x4x/ram_calc.c
M src/soc/amd/stoneyridge/romstage.c
M src/soc/intel/apollolake/romstage.c
M src/soc/intel/baytrail/romstage/romstage.c
M src/soc/intel/broadwell/romstage/romstage.c
M src/soc/intel/cannonlake/romstage/romstage.c
M src/soc/intel/denverton_ns/romstage.c
M src/soc/intel/icelake/romstage/romstage.c
M src/soc/intel/quark/romstage/fsp2_0.c
M src/soc/intel/skylake/romstage/romstage_fsp20.c
22 files changed, 29 insertions(+), 53 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/33775/3