4 Mar
2020
4 Mar
'20
12:39 a.m.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39034 )
Change subject: soc/mediatek/mt8183: Set correct threshold of EMI bandwidth for DVFS switch ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39034/4/src/soc/mediatek/mt8183/emi... File src/soc/mediatek/mt8183/emi.c:
https://review.coreboot.org/c/coreboot/+/39034/4/src/soc/mediatek/mt8183/emi... PS4, Line 305: 0x0a000705 I checked the datasheet and thought BW_2ND_INT_BW_THR should be set in bits 22:16 instead of the highest 8 bits. @huayang could you double check this?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I82c3c70bcd90df3fdd613c0353aba0f176bc82bc
Gerrit-Change-Number: 39034
Gerrit-PatchSet: 4
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